The Floating Gate MOS Device as an Analog Element for Analog Trimming
نویسندگان
چکیده
This paper investigates the use of floating gate MOS devices for analog trimming. A floating gate MOSFET structure, in which tunneling occurs at the corners of a polysilicon slab, has been fabricated using a standard 1.2p.m n-well CMOS process. The analog storage performance of the floating gate is evaluated. A threedimensional device simulator, DAVINCI, is used to characterize the field enhancement due to geometry. The chargetransfer behavior of floating gate MOS devices is thoroughly analyzed and modelled. This model describes the charging and discharging of the floating gate and provides insights to the design of analog floating gate devices. Feedback-based programming strategy is also discussed.
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